What are the must have non-negotiable requirements for this role?
Knowledge in System Verilog for design and verification, scripting languages such as Python, and C/CPP
Experience with FPGA and/or emulation platforms
Experience with lab system debug with logic analyzers, scopes, meters, etc.
Familiarity with AMBA protocol, OCP protocol
Is this an FPGA, SOC FPGA or SOC ASIC project? SOC ASIC target, but we are using a FPGA and Emulator, for silicon verification/validation.
Does the engineer need to contribute in the design (RTL, synthesis), verification (SV/UVM or similar) or validation (post-si testing and system enabling) areas? Verification - writing system-level tests running on the CPU and/or DSP which run on FPGA/Emulator.
Is a hardware (either RTL or Verification) or a firmware / software (system software/firmware, drivers) background a closer fit to the project’s needs? A mix - since it's pre-silicon verification, writing FW like tests, for system level validation.
What are the nice to have details for this role?
Performance modeling and evaluation
Knowledge of OS kernel and experience in driver development
Familiarity with IO’s such as MIPI CSI & DSI, USB, PCIE, LPDDR