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ASIC Pre-Si Validation Engineer
Menlo Park, CA
IT/Engineering and Mobile
Create test plans for validating the SoC, write robust test content (C/C++,Python), contribute to creation of automation/test execution infrastructure
Execute test content to validate the functionality of the silicon to ensure that the hardware is robust
Work with design engineers, 3rd party SoC vendors, software and firmware teams to validate and debug issues at SOC, platform (emulation), or firmware level
Be able to develop verification/validation FW for testing overall SoC level features
Execute performance characterization of Machine Learning ASIC using custom SW tools and ML frameworks
Evaluate, test and validate silicon ensuring specifications are met from functional and performance standpoint
Drive technical debug and resolution of issues encountered at the device and system level. Propose workarounds and implement solutions to complex problems
Excellent knowledge of hardware concepts such as Processors, Fabrics, Memory Controllers, High Speed IOs, Protocol Logic, etc. and writing firmware to stress these interfaces.
Ability to work in a lab environment and simulation validation (RTL & DV simulation)
Proficient at writing test code (C/C++, Python) and understand coding best practices
Excellent debugging and toot cause analysis skills.
Understanding of general performance or power validation
Familiarity with RTOS and low-level FW
Solid understanding of computer architecture and processor design. Working knowledge of ARM/RISC-V architecture and firmware programming
Strong hands on experience in SoC bring up, system validation and debug. Prior experience validating hardware accelerators or GPUs preferred.
Strong verbal and written communication skills
BS/MS in Electrical or Computer Engineering is required with 8-12 years of SoC validation experience
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